Test scoring apparatus

ABSTRACT

Apparatus is disclosed for scoring a test sheet having a control mark column containing (a) a start of test mark, (b) a plurality of answer control marks, and (c) an end of page mark and having answer receiving spaces associated with the answer control marks in either a &#39;&#39;&#39;&#39;vertical&#39;&#39;&#39;&#39; or &#39;&#39;&#39;&#39;horizontal&#39;&#39;&#39;&#39; format. The apparatus includes a control column sensor and circuitry distinguishing the (a), (b), and (c) control marks. Detection of a start of test mark enables mode selection circuitry to condition the apparatus in accordance with mode indicating marks on the sheet. For example detection of a &#39;&#39;&#39;&#39;master&#39;&#39;&#39;&#39; mark conditions the apparatus to enter answers from a master sheet into a correct answer memory. The absence of a master mark places the apparatus in the scoring mode. As each answer control mark is detected, answers from the answer spaces row aligned with that mark are entered into a storage register, then compared serially with data from the correct answer memory. Detection of an incorrect answer to a valid question causes an error mark to be printed on the test sheet; a correct answer increments a score counter. Detection of the end of page mark causes score printout. Provision is made for calculating the average score of many test sheets, and for rescoring individual tests with the same or a different set of stored correct answers.

United States Patent Sokolski et al.

[ Aug. 26, 1975 TEST SCORING APPARATUS [75] Inventors: Michael Sokolski,Newport Beach, Calif.; Thomas J. Poole, Norwood, Mass.

[73] Assignee: Scan-Tron Corporation, Los

Angeles, Calif.

[22] Filed: Jan. 7, 1974 21 Appl. No.2 431,399

Related US. Application Data Primary ExaminerRobert W. Michell AssistantExaminerJohn H. Wolff Attorney, Agent, or Firm-Howard A. Silber 5 7ABSTRACT Apparatus is disclosed for scoring a test sheet having acontrol mark column containing (a) a start of test mark, (b) a pluralityof answer control marks, and (c) an end of page mark and having answerreceiving spaces associated with the answer control marks in either avertical or horizontal" format. The apparatus includes a control columnsensor and circuitry distinguishing the (a), (b), and (c) control marks.Detection of a start of test mark enables mode selection circuitry tocondition the apparatus in accordance with mode indicating marks on thesheet. For example detection of a master mark conditions the apparatusto enter answers from a master sheet into a correct answer memory. Theabsence of a master mark places the apparatus in the scoring mode.

As each answer control mark is detected, answers from the answer spacesrow aligned with that mark are entered into a storage register, thencompared serially with data from the correct answer memory. Detection ofan incorrect answer to a valid question causes an error mark to beprinted on the test sheet; a correct answer increments a score counter.Detection of the end of page mark causes score printout. Provision ismade for calculating the average score of many test sheets, and forrescoring individual tests with the same or a different set of storedcorrect answers.

8 Claims, 13 Drawing Figures CIII] I-llll eases EZZ'J CIIII PATENTEDM1325 [975 3 900 961 sum 1 [1F 5 saw 3 [IF 5 lo Mammy-DZ PATENTEI] AUG 261975 PATENTEUAUBZSISTS .9OO,961

SHIT 11, [1F 5 COUNTER END OF START 29 P E OF TEST (PRINT) (RESET) 75SHIFT,

INCREMENT Anmzasa FROM DATA I37 [36 65 sswsoz 29d V Q g START F" O H OFTEST FROM DALAQ 2 s l L P2 5EN$OR c F OFEEEGE R F0 P 2 7'- R o READ momDMZ-g I4 6d '7; -l43 esuson e s WRITE I39 P PROGRAM TEST SCORINGAPPARATUS This is a division. of application Scr. No. 250,313. filed May4, 1972. now US. Pat. No. 3,800,439.

BACKGROUND OF THE INVENTION 1. Field of the Invention The presentinvention relates to an apparatus for scoring multiple choice tests. andparticularly to such an apparatus using test sheets having control andmode selection marks for conditioning the scoring operation.

2. Description of the Prior Art Automatic test scoring devices representa time saving aid to the overburdened educator. The use of suchapparatus. in conjunction with preprinted multiple choice answer sheets.enables rapid scoring of tests, and permits tests to be given withgreater frequency than might otherwise be considered if the teacher hadto grade the papers manually.

In the past. certain disadvantages have been indigenous to automatictest scoring equipment. For example, the test format usually was fixed.Each question could have only a specific number of possible answers, andthe test had to contain a certain number of questions. Greaterflexibility is desirable. Therefore, one object of the present inventionis to permit the use of test sheets having either the same or adifferent number of answer choices per question. and to enable scoringof tests having fewer or more questions than accommodated on aparticular preprinted answer sheet.

Other prior art problems had to do with the storage of correct answers.In some systems a card containing the correct answers was read in unisonwith the paper being scored. This complicated operation. since twosheets or cards had to be fed into the machine simulta ncously. Anothersystem employed a magnetic drum to store the correct answers. Whileeliminating the repetitive scanning of an answer card. a drum memoryadds substantially to cost and complexity. Another object of the presentinvention is to provide a test scoring apparatus using an addressable.random access memory for storage of correct answers entered once from amaster sheet.

A related problem is that of preventing inadvertent storage of wronganswers. Some prior art devices must be switched manually from the dataentry to the test scoring mode. Failure to set the mode select switchproperly often resulted in incorrect answer storage. Thus a furtherobject of the invention is to provide means for preventing inadvertentstorage of other than the correct answers provided by a master sheet,including provision for automatically switching to the scoring mode whena test sheet is present.

Other features are desirable. These include simplicity of operation.automatic error marking and score printing. computation of the averagescore for a number of tests. and provision for rescoring of tests.

SUMMARY OF THE INVENTION These and other objects are achieved byproviding a test scoring apparatus using a test sheet containing a startof test control mark, a plurality of answer control marks. an end pagemark and other mode selection indicia. Appropriate sensors cooperatewith control mark discrimination and mode detection circuitryautomatically to condition operation of the scorer in response to thesemarks and indicia.

The test sheet may use either a horizontal format in which a fixednumber of answer receiving spaces are row aligned with each answercontrol mark, or a vertical format in which a single answer receivingspace is aligned with each answer control mark. In the vertical formatthe number of answer choices per question is not fixed. The presence orabsence of a format mode selection mark automatically conditions thescorer for vertical or horizontal operation.

Correct answers are stored in an addressable memory from a master sheetidentified by a master mark. Memory read-in is conditioned only if boththe master mark is detected and a program switch has been closed. If theprogram switch is not closed, data entry is inhibited even though amaster sheet is present.,When a test sheet is read by the apparatus, theabsence of a master mark automatically conditions operation in thescoring mode, further preventing the inadvertent storage of wronganswers.

Considerable flexibility is permitted with respect to how many questionsare on a test. For example, the test may have fewer questions thanprovided for on a preprinted test sheet. If no answer is stored in thecorrect answer memory for a particular question, that question isignored when the test sheet is scored. Moreover, the present inventionpermits automatic scoring of multiple page tests, so that the number ofquestions may be greater than that accommodated by a single test sheet.The correct answers for each page are stored in different memorysections. The apparatus is conditioned in response to a page indicatingmark on each test sheet to access the appropriate memory section.

Provisions are made for marking each incorrect answer on the test sheet,for printing each test score, and for calculating the average score fora number of tests. In a rescore mode the error marks and score printoutare offset; in this mode a test can be scored a second time, perhapswith different stored correct answers. This permits a teacher to rescorea set of tests and ignore a question found to be confusing. Otherfeatures will become apparent from the following detailed description ofthe invention.

BRIEF DESCRIPTION OF THE DRAWINGS A detailed description of theinvention will be made with reference to the accompanying drawingswherein like numerals designate corresponding parts in the severalfigures.

FIG. 1 is a perspective view of a test scoring apparatus in accordancewith the present invention.

FIG. 2 is a diagrammatic view of the drive, sensing, error marking andscore printing mechanisms of the present invention. all as seen alongthe line 22 of FIG. 1.

FIG. 3 shows the same mechanisms as FIG. 2, as viewed along the line 33thereof, and shown scoring together with a test sheet having ahorizontal format.

FIGS. 4A, 4B and 4C show respectively a master sheet for enteringcorrect answers into the apparatus of FIG. 1, an incorrectly answeredtest sheet, and a test sheet which has been rescored, all having thehorizontal format.

FIGS. 5A and 58 respectively show an unanswered test sheet and anincorrectly answered, scored test sheet, both having a vertical format.

FIG. 6 is an electrical block diagram of circuitry useful in theapparatus of FIG. 1.

FIG. 7 is an electrical block diagram of the control mark discrimationcircuitry and part of the system control logic of FIG. 6.

FIG. 8 is an electrical block diagram showing portions of the modedetection circuitry and system control logic of FIG. 6.

FIG. 9 is an electrical block diagram of the error detection circuitryof FIG. 6.

FIG. 10 is an electrical block diagram showing the score counter. scoreprinter and print logic of FIG. 6.

DESCRIPTION OF THE PREFERRED EMBODIMENT The following detaileddescription is of the best presently contemplated mode of carrying outthe invention. This description is not to be taken in a limiting sensebut is made merely for the purpose of illustrating the generalprinciples of the invention since the scope of the invention is bestdefined by the appended claims.

Referring now to the drawings, the inventive test scoring apparatus(FIG. 1) is designed to score a test sheet 16 having a horizontal format(FIG. 3) or a test sheet 17 (FIG. 5A) having a vertical format. As shownin FIG. I, the test sheet 16 is placed face up on a verti cally inclinedplaten 18 provided on the apparatus housing 19. A longitudinal edge 16aof the test sheet 16 rests on a ledge 18a at the bottom of the platen18. The test sheet leading edge 16b is inserted behind a reader housing20 containing a pair of drive wheels 21, rotated by a motor 21 whichtransport the test sheet 16 in the direction of the arrow 22. As thetest sheet 16 is driven beneath the housing 20, each incorrect answer isdetected and marked, and the total number of correct answer appears on adisplay 23 and is printed on the sheet 16.

To accomplish this the test sheet 16 is transported past a read station24 containing a light source 25 which illuminates both the control markcolumn 26 and the answer receiving spaces 27 of the test sheet 16. Theread station 24 also includes a control channel sensor 28 which detectscontrol marks in the column 26, and a plurality of data channel sensors29a through 29c which detect answers in the spaces 27.

The control channel sensor 28 may comprise a light guide 280, aphotosensor 28b and an associated amplifier (now shown) which provide anoutput signal on line 31 (FIG. 6) when a control mark is sensed by areduction in the light level reflected from the sheet 16. Similarly. thedata channel sensors 29a 290 each may comprise a light guide, aphotosensor and an associated amplifier providing respective, paralleloutputs via a conduit 32 (FIG. 6). The data channel sensors 29a 29e arerow aligned with the control channel sensor 28.

The control mark column 26 (FIG. 3) is parallel to the longitudinalsheet edge 16a, and is headed by a start of test mark 35 detection ofwhich automatically initiates scoring of the sheet 16. Following thestart of test mark 35 in the column 26 are a plurality of answer controlmarks 37 each row aligned with one or more of the answer spaces 27. Asdescribed below. detection of an answer mark 37 enables appropriatecircuitry to compare an answer entered in a space 27 aligned with thatmark 37 with corresponding correct answer data stored in a memory 38(FIG. 6). The last control mark in the column 26 is an end of page mark39 which enables score printout. The end of page mark 39 also mayfunction as an answer control mark.

The various control marks in the column 26 differ in length parallel tothe sheet edge 16a. The start of test mark 35 is of greatest length, ananswer control mark 37 is of shortest length, and the end of page mark39 is of intermediate length. Appropriate control mark discriminationcircuitry 40 (FIGS. 6 and 7) determines which type of control mark ispresent beneath the sensor 28.

In the horizontal data format of FIG. 3, a single answer control mark 37is associated with each test question. The questions themselves may beidentified by numbers printed in a column 41. For each question, fiveanswer receiving spaces 27 are row aligned with the corresponding answercontrol mark 37. Thus for question 2, the answer receiving spaces 42a42s are aligned with the answer control mark 37a. To answer question 2,an opaque mark is entered in that one of the answer spaces 42a 422corresponding to the selected answer. Such answer indicia are detectedby the control channel sensors 29a 29e which are positioned over therespective answer columns 27a 27c.

If an incorrect answer is detected, an error mark 44 is printed in themargin of the test sheet 16 by a marker 45. Two such error marks 44 areshown in FIG. 48 adjacent the answer control marks 37 for theincorrectly answered questions 2 and 47. Subsequent to detection of theend of page mark 39, the total number of correct answers is printed onthe sheet 16 by a score printer 51. Thus in FIG. 4B the score (43correct answers) has been printed in a region 52 near the trailing edge16: of the test sheet 16.

Correct answers are entered into the memory 38 from a master sheet 16M(FIG. 4A) configured like the test sheet 16. The sheet 16M is identifiedas a master by a mark 53 row aligned with the start of test control mark35 and column aligned with the answer spaces 276'. The correct answersare marked in the spaces 27M. To load the correct answer memory 38, themaster sheet 16M is placed on the platen 18 (FIG. 1) and a prograrriswitch 54 momentarily is depressed. As the master sheet 16M is drivenbeneath the housing 20, the correct answers are written into the memory38. To verify correct data entry, the master sheet again is transportedpast the read station 24 without closing the program switch 54. If thecorrect answers have been entered properly, the display 23 will show ascore equal to the total number of questions on the test.

A test sheet 16 can be scored by the apparatus 15 immediately aftercorrect answer entry from the master sheet 16M. The test sheet 16 has nomark in the master position 53. The absence of such a master mark 53causes the apparatus 19 to function in the score mode, without manualswitching to such mode. The possibility of inadvertently entering wronganswers in the memory 38 is reduced.

Provision for rescoring is included in the apparatus 19. When a rescoreswitch 55 is closed, each error mark 44R (FIG. 4C) is printed at aposition offset from the error mark 44, and the new score is printed ina region 52R offset from the score region 52. The rescore provision maybe used when it is decided to delete a question from a test. Forexample, the correct answers on the master sheet 16M may be usedinitially to score the test sheet 16 of FIG. 4B. A new master sheet (notshown) containing no answer to question 48 then may be used to load thememory 38. When the same test sheet 16 is rescorcd, as shown in FIG. 4C,the answer to question 48 will be ignored, as reflected by the new scoreprinted in the rescore region 52R.

In the vertical format. the test sheet 17 (FIG. SA) has a control markcolumn 26 like that of the sheet 16. However several answer controlmarks 37 are associ ated with each test question. The answer receivingspaces all are situated in a single column 27h detected by the datachannel sensor 29b. End of question marks 56 are provided in a column56' aligned with the sensor 290 to indicate the end of each question.Thus in FIG. A, the question 1 includes two answer receiving spaces 57a,57b row aligned with the respective answer control marks 37a and 3711.An end of question mark 560 aligned with the answer control mark 37bindicates that the answer space 57!) is the last one associated withquestion 1.

The apparatus scores the test sheet 17 in a manner similar to that forthe horizontal format. The circuitry of FIG. 6 is conditioned to thevertical format by detection of a vertical mark 58 row aligned with thestart of test mark and column aligned for detection by the data channelsensor 29d. Absence of a vertical mark 58, as on the test sheet 16,causes the apparatus 19 to score in the horizontal mode. In the verticalmode, the error marker places a mark 44' (FIG. 58) adjacent eachincorrect answer. The score is printed by the printer 51 in the region52' subsequent to detection of the end of page mark 39'. Illustrativecircuitry for the scoring apparatus 15 is shown in FIG. 6. A command andcontrol section 61 directs system operation in response to detection ofthe control and mode marks discussed above. The command section 61includes the control mark discrimination circuitry 40 which provides astart of test" signal on a line 62 upon detection of the control mark 35or 35. This signal enables the mode detection circuitry 63 to ascertainthe answer format and whether a master or test sheet is being sensed.Detection of a master mark 53 causes the de tection circuitry 63 toprovide on a line 64 a signal indicating that a master sheet is present.Vertical or horizontal (V/H) format is indicated by signal on a line 65in response to detection or absence of a vertical mark 58.

System control logic 66, included in the command section 61, cooperateswith timing circuitry 67 to enter correct answers into a master storageunit 68 when the master signal is present on the line 64 and the programswitch 54 is closed. In such instance. the logic 66 supplies a writc"signal via a line 69 to enable data entry to the correct answer memory38. The logic 66 also conditions a data input unit 70 to receivevertical or horizontal (V/H) data via the conduit 32 from the channelsensors 29u29e.

As the master sheet moves past the read station 24, each answer controlmark 37 or 37' causes the discrimination circuitry 40 to provide ananswer signal on a line 72. In response to this signal, the logic 66provides an increment address signal via a line 73 to an address control74 which directs data entry to the appropriate storage locations of thememory 38. The logic 66 also provides shiff' signals via a line 75 toshift control circuitry 76 associated with a data storage registerregistcr The register 77, which may comprise a conventional shiftregister. receives the parallel outputs from the data channel sensors2911-290. The shift control circuitry 76 causes this data to be shiftedout of the registecr 77 serially and supplied via a line 78 to thecorrect answer memory 38. In the horizontal format, data from theseveral answer receiving spaces associated with one answer control mark37 are supplied serially via the line 78 before detection of the answercontrol mark 37 for the next question. In the vertical format, oneanswer bit is supplied via the line 78 each time an answer control mark37' is detected.

When the control mark 39 or 39 is sensed, the discrimination circuitry40 provides an end of page" signal on a line 80. If the mark 39 or 39also is used as an answer control mark, appropriate increment addressand shift signals also are supplied by the logic 66 on the lines 73 and75.

When a test sheet 16 or 17 is scored by the apparatus 15, the start oftest signal on the line .62 combined with the absence of a master signalon the line 64 causes the logic 66 to provide a read signal on the line69 enabling readout of correct answers from the memory 38. As eachanswer control mark 37 or 37 is sensed, the answer signal on the line 72causes the logic 66 to provide appropriate increment address and shiftsignals. Accordingly, test answers read from the sheet 16 or 17 will beprovided via the data storage register 77 and the line 78 to an errordetection unit 80. These test answers are compared by an answercomparator 81 with the correct answers supplied from the memory 38 via aline 82. If an error is detected, a signal is provided on a line 83causing the error marker 45 to print an error mark 44 or 44'.

If no error is detected, a signal is provided via a line 84 to a circuit85 which determines whether a valid question is present. This isaccomplished by ascertaining from data on the line 82 whether the memory38 contained an answer for the question being scored. If no answer hasbeen stored, the question is considered invalid, and the score is notincremented. If the question is valid and there is no error, the circuit85 provides an increment score signal via a line 86 to a scoring andmarking section 87.

The signal on the line 86 increments a score counter 88 associated withthe score printer 51 and a score counter 89 associated with the display23. These counters 88, 89 talley the number of correct answers on thesheet 16 or 17 presently being scored.

When the end of page mark 39 or 39' is detected, the system controllogic 66 provides a print signal on a line 91. This signal causesappropriate print logic 92 to transfer the test score from the counter88 to the score printer 51 for printout onto the sheet 16. This transferoperation clears the score counter 88. The score counter 89 retains thetest score until the next test sheet 16 is fed into the apparatus 15.When that occurs, the start of test signal on the line 62 causes thelogic 66 to provide a reset signal on a line 93. This reset signalclears the score counter 89 and resets the address control 74 to ensurereadout of the correct answer memory 38 beginning with the firstquestion being scored.

Rescore operation is like that for normal scoring. However, when therescore switch 55 is closed, the system control logic 66 provides arescore signal via a line 94 to the error marker 45 and the print logic92. This results in offsetting of the error marks and printed score.

The apparatus 15 (FIG. 1) also includes provision for computing anddisplaying the average score for a number of test sheets. Accordingly,the scoring and marking section 87 (FIG. 6) includes a sum (2) scoreaccumulator 95 and a number of tests counter 96 which are cleared by asignal on a line 97 only when the apparatus is set to the program mode.Thereafter, the accumulator 95 is incremented by the increment scoresignal on the line 86 so that the contents of the accumulator 95represents the total number of correct answers for all the test sheetsscored since entry of the master. The number of tests counter 96 isincremented by the signal on the line 80 each time end of page signaloccurs, so that the contents of the counter 96 represent the number ofsheets scored since entry of the master.

To obtain the average score, a compute average switch 98 is depressed.This causes an average computer 99 to divide the sum score from theaccumulator 95 by the number of tests indicated by the counter 96. Thequotient, or average test score, is shown on the display 23 when thecompute average switch 98 is depressed, instead of the current testscore from the counter 89.

Simplified control mark discrimination circuitry 40 is shown in FIG. 7.A clock 110 provides timing (CLK) pulses on a line 111 at a ratesufficient to produce at least fifteen such pulses between sensing ofconsecutive answer control marks 37. When the sensor 28 detects theleading edge of any control mark in the column 26 or 26, the signal onthe line 31 sets (S) a flip-flop (F/F) l 12 to the true or 1 state. Theresultant output on a line 113 enables an AND gate 114 to supply theclock pulses to a counter 115. Accordingly, the counter 115 acts as atimer started upon detection of the leading edge of any control mark andproviding timing outputs designated T through T as the respective firstthrough fifteenth CLK pulses are provided via the gate 114. Occurrenceof the T signal resets the flip-flop 112.

The CLK pulse rate is appropriately selected with respect to the size ofthe control marks and the rate of transport of the test sheets past theread station 24 so that only for a start of test mark 35 or 35' will thecontrol channel sensor 28 still provide an output when the timing outputT,, occurs. Thus the start of test signal on the line 62 simply may beprovided by an AND gate 116 receiving the sensor 28 output on the line31 and the T timing output via a line 117. The signal on the line 62 mayenable the reset signal on the line 93 (FIG. 6) and sets a flip-flop 118used in conjunction with the end of page discrimination circuitry.

The length of each answer control mark 37 or 37 is selected to produce asensor 28 output of duration less than four CLK pulses, and the end ofpage mark 39 or 39' is selected to produce a signal on the line 31 ofduration greater than four clock pulses. Accordingly, the end of pagesignal on the line 80 may be provided by a three input AND gate 119receiving the sensor 28 output via the line 31 and the T timing signalvia a line 120.

The AND gate 119 is enabled by the set of 1 output of the flip-flop 118provided via a line 121. The flip flop 118 ensures that a signal doesnot occur on the line 80 during detection of a start of test mark 35 or35'although such mark is greater than four CLK pulses in duration. Theflip-flop 118 is reset by the trailing edge of the end of page signal.

Illustrative circuitry for producing the shift and increment addresssignals also is shown in FIG. 7. For tests in the horizontal (H) format,a number of shift signals equal to the number of answer receiving spaces27 associated with each answer control mark 37 produced when a controlmark is detected. Thus for use with the test sheet 16, five shiftsignals are provided in unison with the T through T CLK intervals. Fortests in the vertical (V) format, a single shift signal is provided atthe T clock time.

To this end, a flip-flop 125 is set by the T output provided via a line126 from the counter 115. The flip-flop 125 is reset by the T timingsignal supplied via an AND gate 127 enabled when the vertical (V) formatis used. For tests in the horizontal (H) format, the T timing signal issupplied via an AND gate 128 to reset the flipflop 125. The shift pulseson the line may be produced by an AND gate 129 enabled by the 1 outputon the line 130 from the flip-flop to pass the CLK pulses from the line111. With this arrangement, detection of each control mark will causeone shift pulse to be provided by the AND gate 131 for the verticalformat and five shift pulses to be provided for the horizontal format.

The output from the AND gate 129 also may correspond to the incrementaddress signals on the line 73, with appropriate provision to inhibitsuch signals during detection of the start of test mark 35 or 35'. Alternatively, it may be preferred to have the shift pulses lag the incrementaddress pulses. This may be accomplished by using the AND gate 129output as the increment address signal. Delayed shift signals then maybe supplied a separate AND gate (not shown) combining the signal on theline with inverted (CLK) clock pulses from the line 1 ll.

Illustrative mode detection circuitry 63 is shown in FIG. 8. A flip-flop135 provides an output indicating whether the test being scored is inthe vertical (V) or horizontal (H) format. Occurrence of the start oftest signal on the line 62 enables an AND gate 136 which receives via aline 137 the output from the data channel sensor 29d. If a vertical mark58 is present on the test or master sheet being read, the signal on theline 137 will be true and the flip-flop 135 will be set, providing a Voutput on a line 65a. This signal, which is present until the flip-flop135 is reset upon occurrence of the end of page signal on the line 80,conditions the apparatus 15 to score a test in the vertical-format. Ifthe vertical mark 58 is not present, the flip-flop 135 will remain inthe 0 state, providing an H output on a line 65b 'indicative of thehorizontal format.

Programming or entry of correct answers to the memory 38 occurs onlywhen the program switch 54 is closed and a master sheet is present. Abistable circuit 138 (FIG. 8) comprising an inverter 139 and a NAND gate140 is set when the switch 54 momentarily is closed. When so set, thecircuit 138 enables a three input AND gate 141 which also receives asinputs the start of test signal on the line 62 and the output from thedata channel sensor 296 via a line 142. If the master mark 53 ispresent, all three inputs to the AND gate 141 will be true and a signalwill be provided via a line 64 to set a flip-flop 143. As a result, awrite signal is supplied via a line 69a to enable correct answer entryinto the memory 38. The flip-flop 143 is reset by the end of page signalon the line 80.

lfa test sheet is read, no signal occurs on the line 142 in unison withthe start of test signal, since the test sheet has no master mark 53. Asa result, the flip-flop 143 is not set, regardless of whether theprogram switch 54 has been closed, and a read output is provided on aline 69b to condition readout of correct answers from the memory 38.

The bistable circuit 138 automatically is reset, as by the timing pulseT Thus if the master sheet is reread by the apparatus 15 without againdepressing the program switch 54, no output will occur from the AND gate141, and the flip-flop 143 will continue to provide a read output forverification of data entry; the answers will not be rewritten to thememory 38.

The memory 38 (FIG. 6) may have sufficient capacity to store the correctanswers for two separate tests, or for a single test requiring twoanswer sheets. Thus, in FIG. 9 the memory 38 includes two sections 38a,3817 each of which may have 250 binary storage locations, sufficient tostore the correct answers for a one hundred question test having fivepossible answers for each question, with 50 questions on a first testsheet (page 1) and 50 questions on a second test sheet (page 2). Theaddress control 74 may be conditioned to access the correct memorysection 38a, 38b in response to a control signal on a line 150indicative of whether the answer sheet first (P,) or second (P page isbeing read.

The P /P control signal may be provided automatically by the modedetection circuitry 63 (FIGS. 6 and 8) in response to a page mark (notillustrated) located in row alignment with the start of page mark 35 or35', and column aligned for detection by the data channel sensor 290.The presence of such a mark might designate a second page, while absenceof such mark may indicate page 1.

Accordingly, a flip-flop 151 (FIG. 8) is set by the output of an ANDgate 152 upon simultaneous occurrence of the start of test signal on theline 62 and an output on a line 153 from the data channel sensor 296.

When set to the one state, the flip-flop 151 provides a P output on aline 150a to direct readout from the correct answer memory section 38b.In the absence of such a page mark, the flip-flop 151 will provide a Poutput via a line 1501) to address the memory section 3811. The 1 and Psignals also enable the respective AND gates 154, 155 (FIG. 9) toprovide the appropriate correct answers from the memory 38 via an ORgate 156 and the line 82 to the answer comparator 81.

The answer comparator 81 may be implemented by an EXCLUSIVE OR gate 81'receiving correct answer data via the line 82 and answers from the testsheet being scored via the line 78. The signals on the lines 78 and 82both are in serial, binary form. If the compared data are identical(both binary l or both no output is produced by the EXCLUSIVE OR gate81. If the data bits on the lines 78 and 82 are different (one a binary0 and the other a l the EXCLUSIVE OR gate 81 will produce an output on aline 160 to set a pair of flipflops 161, 162 used in conjunction witherror marking and incrementing of the score.

A valid question indicating flip-flop 163 (FIG. 9) is set if at leastone binary 1 has been stored for the corresponding question in thememory 38. The flip-flop 163 is reset at the end of each question. Inthe horizontal format the reset signal is provided by an AND gate 164receiving as inputs the H signal on line 65b and the T signal from thecounter 115. The output of the AND gate 164 is supplied via an OR gate165 to a line 166; the trailing edge of this signal resets the flip-flop163. In the vertical data format, the reset signal is supplied by an ANDgate 167 receiving as inputs the V signal on the line 65a and the outputof the data channel sensor 2% on a line 168. As noted above. the sensor29b output indicates detection of each end of question mark 56 on a testsheet 17.

For each question, the flip-flop 163 is set only if a binary l is readfrom the correct answer memory 38 via the line 82 prior to occurrence ofthe next end of ques-, tion resetting signal on the line 166. When set,the flip-f flop 163 provides a valid signal on line 169 to enable an ANDgate 170.

The signal on the line 166 also resets an error indicat ing flip-flop161. If for a particular question the test sheet data on the line 78 isidentical to the correct answer data on the line 82, no signal willoccur on the line and the flip-flop 161 will remain in the 0 state. As aresult, a no error signal will be provided via the line 84 to the ANDgate 170. When enabled by the valid signal on the line 169, the end ofquestion signal on the line 166 and the no error signal on the line 84,the AN D gate 170 will provide the increment score signal on the line86. If an error is detected, or if the question is invalid, no incrementscore signal will be produced.

For test sheets in the horizontal mode, a single error mark 44 or 44R(FIGS. 4B and 4C) is printed for each incorrectly answered question. Toaccomplish this, the 1 output of the flip-flop 161 is ANDed with the Hsignal on the line 6512 by a gate 172 the output of which is suppliedvia an OR gate 173 to an AND gate 174 enabled by a timing signal on aline 175. The output from the AND gate 174 comprises the mark errorsignal on the line 83 to the marker 45.

When rescore is not selected, the timing signal on the line 175 is inunison with the T output from the counter 115. The T signal is ANDed ina gate 176 with the complement of the rescore signal from the line 94.The output of the AND gate 176 is supplied to the line 175 via an ORgate 177. During rescore, the timing signal on the line 175 is in unisonwith the T signal provided via an AND gate 178 enabled by the rescoresignal from the line 94. When rescore is not selected, each error mark44 is in the position shown in FIG. 4C. When rescore. is selected, theerror mark is enabled at a later time (T instead of T causing the errormarks 44R to be offset as shown in FIG. 4C.

In the vertical format an error mark is produced each time there is amismatch between a data bit from the memory 38 and the correspondingtest sheet data bit on the line 78. When such mismatch occurs the signalon the line 160 sets the flip-flop 162 (FIG. 9) to produce an output ona line 179 which is ANDed by a gate 180 with the V signal on the line65a. The output of the AND gate 180 then is supplied via the OR gate 173and the OR gate 174 to the mark error line 83. The flip-flop 161 isreset at the end of each timing cycle by the T pulse.

A typical embodiment of the print logic 92 is shown in FIG. 10. Therethe score counter 88 is a decimal counter comprising a units section88U, a tens section 88T and a hundreds section 88H. The increment scoresignal on the line 86 is supplied to the increment (1) input of theunits section 88U. The carry (C) output of the section 88U is connectedto the increment input of the tens counter 881. The tens and hundredssections 88T, 88H are similarly connected. Thus when all questions on atest sheet have been scored, the counter 88 will contain a decimalrepresentation of the number of correct answers.

The score printer 51 contains separate units, tens and hundreds printwheels 51U, 51T, 51H which are cleared by the reset signal on the line93. When the print signal on the line 91 occurs, the units counter 88Urapidly is decremented to zero as the units print wheel 51U is advancedby a like number of counts. At the same time. the tens and hundredscounters 8ST, 88H are decremented to zero as the print wheels 51T, 51Hare incremented correspondingly. When all of the counter sections 88U,88T, 88H have been decremented to zero, the print wheels 51U, 51T, 51Hwill be set to the test score. Appropriate print hammers 51a cooperatewith the wheels 51U, 51T, 51H to print out the score.

To set the print wheels, the print signal on the line 91 sets aflip-flop 185 to supply via a line 186 a signal which enables an ANDgate 187. The AND gate 187 then supplies pulses from a decrement clock188 to a line 189 connected to the decrement (D) input of each countersection 88U, 88T, 88H. The clock pulses on the line 189 also aresupplied via an AND 190 to the increment (l) input of the units printwheel SlU. The AND gate 190 is enabled by the complement of the borrow(B) output from the units counter 88U as provided by an inverter 191.

As each clock pulse decrements the counter section 88U it alsoincrements the print wheel lU. When the contents of the units counter88U reach zero, the borrow output goes from zero to one therebydisabling the AND gate 190. As a result, the print wheel SlU will be setto exactly the same number as contained by the units section 88U whenthe decrementing was initiated. in effect, the contents of the unitscounter 88U will be transferred to the units print wheel 51U. Similarly,the AND gates 192 and inverter 193 cooperate to transfer the contents ofthe tens counter 8ST to the tens print wheel 51T, and the AND gate 194and inverter 195 transfer the contents of the hundreds counter 88H tothe hundreds print wheel 51H.

The borrow (B) outputs of all three counter sections 88U, 8ST, 88H areANDed by a three input gate 197 to provide on a line 198 a signal whichindicates that the entire score has been transferred to the print wheelsof the printer 5]. This signal is ANDed by a gate 199 with the enablesignal on the line 186 and a timing signal on a line 200 to produce on aline 201 a signal causing operation of the print hammers 51a.

The timing signal on the line 200 may occur in unison with a firsttiming pulse T gated by an AND gate 202 when rescore is not selected orin unison with a later timing pulse T gated by another AND gate 203 whenrescore is selected. Timing of the signals T T determine whether thescore is printed in the test sheet location 52 or 52R as shown in FIG.4C.

Intending to claim all novel, useful and unobvious features shown ordescribed, we make the following claims:

1. A test sheet for use with a scoring apparatus of the type whereinanswers are sensed concurrently with detection of an answer controlmark, comprising:

a sheet of material having an elongate rectangular shape with first andsecond generally straight longitudinal edges,

only a single control mark column, parallel to said first longitudinaledge and containing in the following order a start of test mark of firstlength, a plurality of answer control marks each of a second lengthdifferent from said first length, each answer control mark being rowaligned with a corresponding answer row perpendicular to said firstedge, and a page termination mark having a third length different fromboth said first and second lengths, said first, second and third lengthsbeing measured in a direction parallel to said first longitudinal edge,said start of test mark being longer than said page termination mark,said page termination mark being longer than each answer control mark,and

at least one answer column parallel to said control mark column butspaced therefrom, each answer row containing an answer receiving spacealigned in each answer column.

2. A test sheet according to claim 1 wherein said sheet materialcomprises paper.

3. A test sheet according to claim 1, wherein each answer row contains aplurality of answer receiving spaces designated to correspond toselectable answers of a multiple choice question.

4. A test sheet according to claim 3 wherein said page termination markis aligned with a corresponding answer row.

5. A test sheet according to claim 3 wherein said page termination markis spaced from a transverse edge of said rectangular sheet, and a scorereceiving area on said sheet between said page termination mark and atransverse edge of said sheet.

6. A test sheet according to claim 1, wherein each answer row containsonly one answer receiving space in a corresponding answer column, aplurality of successive answer rows being allocated to correspond toselectable answers ofa multiple choice question, and further comprising:

an end of question column parallel to said first longitudinal edge butspaced from both said control mark column and said answer column andcontaining marks row aligned with the last answer space associated witheach question.

7. A test sheet according to claim 12 further comprising;

a set of mode indicating indicia row aligned with said start of testmark and a column aligned with at least one of said answer columns.

8. A test sheet according to claim 7 wherein;

a first of said mode indicating indicia designates that the sheet is amaster containing correct answers to be entered into said scoringapparatus, and wherein another of said indicia designates the answerformat of said sheet.

1. A test sheet for use with a scoring apparatus of the type whereinanswers are sensed concurrently with detection of an answer controlmark, comprising: a sheet of material having an elongate rectangularshape with first and second generally straight longitudinal edges, onlya single control mark column, parallel to said first longitudinal edgeand containing in the following order a start of test mark of firstlength, a plurality of answer control marks each of a second lengthdifferent from said first length, each answer control mark being rowaligned with a corresponding answer row perpendicular to said firstedge, and a page termination mark having a third length different fromboth said first and second lengths, said first, second and third lengthsbeing measured in a direction parallel to said first longitudinal edge,said start of test mark being longer than said page termination mark,said page termination mark being longer than each answer control mark,and at least one answer column parallel to said control mark column butspaced therefrom, each answer row containing an answer receiving spacealigned in each answer column.
 2. A test sheet according to claim 1wherein said sheet material comprises paper.
 3. A test sheet accordingto claim 1, wherein each answer row contains a plurality of answerreceiving spaces designated to correspond to selectable answers of amultiple choice question.
 4. A test sheet according to claim 3 whereinsaid page termination mark is aligned with a corresponding answer row.5. A test sheet according to claim 3 wherein said page termination markis spaced from a transverse edge of said rectangular sheet, and a scorereceiving area on said sheet between said page termination mark and atransverse edge of said sheet.
 6. A test sheet according to claim 1,wherein each answer row contains only one answer receiving space in acorresponding answer column, a plurality of successive answer rows beingallocated to correspond to selectable answers of a multiple choicequestion, and further comprising: an end of question column parallel tosaid first longitudinal edge but spaced from both said control markcolumn and said answer column and containing marks row aligned with thelast answer space associated with each question.
 7. A test sheetaccording to claim 12 further comprising; a set of mode indicatingindicia row aligned with said start of test mark and a column alignedwith at least one of said answer columns.
 8. A test sheet according toclaim 7 wherein; a first of said mode indicating indicia designates thatthe sheet is a master containing correct answers to be entered into saidscoring apparatus, and wherein another of said indicia designates theanswer format of said sheet.